Messages in this thread | | | From | Michael Walle <> | Subject | Re: [PATCH v3 3/8] arm64: dts: ls1028a: add flextimer based pwm nodes | Date | Thu, 28 Jul 2022 11:33:18 +0200 |
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Hi,
sorry for digging up this old thread. But I've noticed some inconsistencies here while syncing the device tree with u-boot.
>> On Wed, Apr 13, 2022 at 06:07:20PM +0000, Leo Li wrote: >> > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:1210.21-1219.5: >> > > Warning >> > > (unique_unit_address): /soc/pwm@2800000: duplicate unit-address >> > > (also used in node /soc/timer@2800000) >> > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:1221.21-1230.5: >> > > Warning >> > > (unique_unit_address): /soc/pwm@2810000: duplicate unit-address >> > > (also used in node /soc/timer@2810000) >> > >> > Well, this is similar situation as pcie. The flextimer controller can >> > be used as timer, PWM or alarm. We have separate drivers and bindings >> > for these modes which resulted in different nodes for the same >> > controller. >> >> I think the mfd framework can address the situation where multiple drivers, >> with multiple functionalities, want access to the same memory region? > > I know mfd is used for device providing multiple functions at the same > time. I'm not sure if it can help dealing with the one function at a time > scenario.
Funnily enough, I had the same concern: https://lore.kernel.org/lkml/92eaa24876a823aa5833435f51095812@walle.cc/
Anyway, I have a few questions about the device tree here:
> + rtc_clk: rtc-clk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + clock-output-names = "rtc_clk"; > + }; > +
Is that an internal clock? I've checked the RDB schematics and the RTC clock output is not connected to anything. The RM of the LS1028A mentions the fixed clock input of the flex timer, but it doesn't say where it is connected to. It just says there is no "internally-generated secure clock" support on any of the timer modules.
In ch19.3 it also says "For the chip-specific implementation details of this module's instances, see the chip configuration information". But I'm not sure where to find this.
> + pwm0: pwm@2800000 { > + compatible = "fsl,vf610-ftm-pwm"; > + #pwm-cells = <3>; > + reg = <0x0 0x2800000 0x0 0x10000>; > + clock-names = "ftm_sys", "ftm_ext", > + "ftm_fix", "ftm_cnt_clk_en"; > + clocks = <&clockgen 4 1>, <&clockgen 4 1>, > + <&rtc_clk>, <&clockgen 4 1>;
ftm_ext seems to be the (optional) external clock, eg FTMn_EXTCLK. Why is it connected to <&clockgen 4 1>? That doesn't make sense. The driver itself, won't probe if the clock isn't there either and assumes that the external clock is always there. That seems wrong, too.
Can you shed some light on this?
-michael
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