Messages in this thread | | | Subject | Re: [PATCH v3 3/4] LoongArch: Remove -fplt and -Wa,-mla-* from CFLAGS | From | Xi Ruoyao <> | Date | Fri, 29 Jul 2022 10:50:59 +0800 |
| |
On Fri, 2022-07-29 at 10:09 +0800, Xi Ruoyao wrote: > -fplt is the default of all supported compilers (GCC, and maybe Clang in > the future), so it needs not to be explicitly specified. > > -Wa,-mla-* options were used to prevent the assembler from generating > GOT accesses for "la.local" and "la.global" macros. But GCC >= 13 will > generate GOT access explicitly without use of these macros
Will add "by default with an assembler supporting explicit relocations, and it's not recommended to override the default" here in V4.
> options are ineffective for symbol addressing in C code with GCC >= 13. > Now we can handle GOT and GOT-based relocations properly, so we can > remove these options and use GOT access for both GCC 12 and 13 > (or newer). > > GAS <= 2.39 does not support "la.got [reg], [sym] + [offset]" with a > non-zero offset. So in the assembly code we explicitly use "la.pcrel" > instead of "la" (now defaulted to "la.got") where a PC-relative > addressing is suitable, in order to work around this limitation and keep > the compatibility with old toolchains. > > Signed-off-by: Xi Ruoyao <xry111@xry111.site> > --- > arch/loongarch/Makefile | 4 ---- > arch/loongarch/kernel/head.S | 10 +++++----- > 2 files changed, 5 insertions(+), 9 deletions(-) > > diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile > index 039dcc4fe1f3..800349ea9310 100644 > --- a/arch/loongarch/Makefile > +++ b/arch/loongarch/Makefile > @@ -40,10 +40,6 @@ endif > > cflags-y += -G0 -pipe -msoft-float > LDFLAGS_vmlinux += -G0 -static -n -nostdlib > -KBUILD_AFLAGS_KERNEL += -Wa,-mla-global-with-pcrel > -KBUILD_CFLAGS_KERNEL += -Wa,-mla-global-with-pcrel > -KBUILD_AFLAGS_MODULE += -Wa,-mla-global-with-abs > -KBUILD_CFLAGS_MODULE += -fplt -Wa,-mla-global-with-abs,-mla-local-with-abs > > cflags-y += -ffreestanding > cflags-y += $(call cc-option, -mno-check-zero-division) > diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S > index 74ea7bf6c8d6..193329ed6e8c 100644 > --- a/arch/loongarch/kernel/head.S > +++ b/arch/loongarch/kernel/head.S > @@ -60,17 +60,17 @@ SYM_CODE_START(kernel_entry) # kernel entry point > la.abs t0, 0f > jirl zero, t0, 0 > 0: > - la t0, __bss_start # clear .bss > + la.pcrel t0, __bss_start # clear .bss > st.d zero, t0, 0 > - la t1, __bss_stop - LONGSIZE > + la.pcrel t1, __bss_stop - LONGSIZE > 1: > addi.d t0, t0, LONGSIZE > st.d zero, t0, 0 > bne t0, t1, 1b > > - la t0, fw_arg0 > + la.pcrel t0, fw_arg0 > st.d a0, t0, 0 # firmware arguments > - la t0, fw_arg1 > + la.pcrel t0, fw_arg1 > st.d a1, t0, 0 > > /* KSave3 used for percpu base, initialized as 0 */ > @@ -78,7 +78,7 @@ SYM_CODE_START(kernel_entry) # kernel entry point > /* GPR21 used for percpu base (runtime), initialized as 0 */ > or u0, zero, zero > > - la tp, init_thread_union > + la.pcrel tp, init_thread_union > /* Set the SP after an empty pt_regs. */ > PTR_LI sp, (_THREAD_SIZE - 32 - PT_SIZE) > PTR_ADD sp, sp, tp
-- Xi Ruoyao <xry111@xry111.site> School of Aerospace Science and Technology, Xidian University
| |