> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Thursday, July 21, 2022 18:41
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Vinod
> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> phy@lists.infradead.org
> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
> 
> 
> 
> On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Saturday, July 16, 2022 1:00
> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> Anderson
> >> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
> >> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
> >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> >> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> >> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> >> bindings
> >>
> >> This adds appropriate bindings for the macs which use the SerDes. The
> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> >> no driver for this device (and as far as I know all you can do with the
> >> 100MHz clocks is gate them), so I have chosen to model it as a single
> >> fixed clock.
> >>
> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> >> This means that Lane A (what the driver thinks is lane 0) uses pins
> >> SD1_TX3_P/N.
> >>
> >> Because this will break ethernet if the serdes is not enabled, enable
> >> the serdes driver by default on Layerscape.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >> Please let me know if there is a better/more specific config I can use
> >> here.
> >>
> >> (no changes since v1)
> >
> > My LS1046ARDB hangs at boot with this patch right after the second SerDes
> is probed,
> > right before the point where the PCI host bridge is registered. I can get
> around this
> > either by disabling the second SerDes node from the device tree, or
> disabling
> > CONFIG_PCI_LAYERSCAPE at build.
> >
> > I haven't debugged it more but there seems to be an issue here.
> 
> Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been
> testing with
> anything there. For now, it may be better to just leave it disabled.
> 
> --Sean

Yes, I have an Intel e1000 card plugged in.

Camelia