> /* The following registers all have similar layouts; first the registers... */
> #define VEND1_GLOBAL_CFG_10M				0x0310
> ...
> /* ... and now the fields */
> #define VEND1_GLOBAL_CFG_RATE_ADAPT			GENMASK(8, 7)

O.K, that will also help prevent the misunderstanding i had.

     Andrew