Messages in this thread | | | Date | Thu, 30 Jun 2022 09:14:06 -0700 | From | Davidlohr Bueso <> | Subject | Re: [PATCH V12 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices |
| |
On Thu, 30 Jun 2022, Jonathan Cameron wrote:
>On Wed, 29 Jun 2022 22:32:57 -0700 Ira Weiny <ira.weiny@intel.com> wrote:
>> I _thought_ that we did not care if some mailboxes failed or not. > >I have a different view to Dan on this. In my view if your hardware is >not working in any way at all scream like mad don't carry on... Dan >is keen to try to muddle onwards.
I am also of the idea of not carrying on upon any indication of failure.
>> >> If CDAT is not supported on any of the mailboxes found then CDAT will not show >> up on sysfs (as per Dan's last comment). If it was supported on a mailbox but >> no data is found the sysfs will show up but be 0 length. >> >> At this layer I thought we agreed to skip over these errors. If a protocol is >> needed at a higher layer and it is not found on any of the mailboxes the errors >> should show up in that layer. In this series CDAT is not 100% necessary as >> devices can work without it. So the errors were mostly paper'ed over in favor >> of just printing error messages and muddle on. >> >> The xa_insert() deserves a pci_err() though. > >That's probably the minimum we should do. The xa_insert() failing is something >horrible going wrong in our software / host afterall.
Yes. And in addition, devm_cxl_pci_create_doe() should return any error status, and cxl_pci_probe() can choose to omit any errors, but it's still better to have it.
Thanks, Davidlohr
| |