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    Subject[PATCH v6 03/33] objtool: arm64: Decode add/sub instructions
    Date
    Decode aarch64 additions and substractions and create stack_ops for
    instructions interacting with SP or FP.

    Signed-off-by: Julien Thierry <jthierry@redhat.com>
    Signed-off-by: Chen Zhongjin <chenzhongjin@huawei.com>
    ---
    tools/objtool/arch/arm64/decode.c | 82 +++++++++++++++++++++++++++++++
    1 file changed, 82 insertions(+)

    diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c
    index afe22c4593c8..d8c32703874d 100644
    --- a/tools/objtool/arch/arm64/decode.c
    +++ b/tools/objtool/arch/arm64/decode.c
    @@ -15,6 +15,22 @@

    #include "../../../arch/arm64/lib/insn.c"

    +#define is_SP(reg) (reg == AARCH64_INSN_REG_SP)
    +#define is_FP(reg) (reg == AARCH64_INSN_REG_FP)
    +#define is_SPFP(reg) (reg == AARCH64_INSN_REG_SP || reg == AARCH64_INSN_REG_FP)
    +
    +#define ADD_OP(op) \
    + if (!(op = calloc(1, sizeof(*op)))) \
    + return -1; \
    + else for (list_add_tail(&op->list, ops_list); op; op = NULL)
    +
    +static unsigned long sign_extend(unsigned long x, int nbits)
    +{
    + unsigned long sign_bit = (x >> (nbits - 1)) & 1;
    +
    + return ((~0UL + (sign_bit ^ 1)) << nbits) | x;
    +}
    +
    bool arch_callee_saved_reg(unsigned char reg)
    {
    switch (reg) {
    @@ -105,6 +121,42 @@ int arch_decode_hint_reg(u8 sp_reg, int *base)
    return -1;
    }

    +static inline void make_add_op(enum aarch64_insn_register dest,
    + enum aarch64_insn_register src,
    + int val, struct stack_op *op)
    +{
    + op->dest.type = OP_DEST_REG;
    + op->dest.reg = dest;
    + op->src.reg = src;
    + op->src.type = val != 0 ? OP_SRC_ADD : OP_SRC_REG;
    + op->src.offset = val;
    +}
    +
    +static void decode_add_sub_imm(u32 instr, bool set_flags,
    + unsigned long *immediate,
    + struct stack_op *op)
    +{
    + u32 rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, instr);
    + u32 rn = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RN, instr);
    +
    + *immediate = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_12, instr);
    +
    + if (instr & AARCH64_INSN_LSL_12)
    + *immediate <<= 12;
    +
    + if ((!set_flags && is_SP(rd)) || is_FP(rd)
    + || is_SPFP(rn)) {
    + int value;
    +
    + if (aarch64_insn_is_subs_imm(instr) || aarch64_insn_is_sub_imm(instr))
    + value = -*immediate;
    + else
    + value = *immediate;
    +
    + make_add_op(rd, rn, value, op);
    + }
    +}
    +
    int arch_decode_instruction(struct objtool_file *file, const struct section *sec,
    unsigned long offset, unsigned int maxlen,
    unsigned int *len, enum insn_type *type,
    @@ -112,6 +164,7 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
    struct list_head *ops_list)
    {
    const struct elf *elf = file->elf;
    + struct stack_op *op = NULL;
    u32 insn;

    if (!is_arm64(elf))
    @@ -130,6 +183,35 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
    case AARCH64_INSN_CLS_UNKNOWN:
    WARN("can't decode instruction at %s:0x%lx", sec->name, offset);
    return -1;
    + case AARCH64_INSN_CLS_DP_IMM:
    + /* Mov register to and from SP are aliases of add_imm */
    + if (aarch64_insn_is_add_imm(insn) ||
    + aarch64_insn_is_sub_imm(insn)) {
    + ADD_OP(op) {
    + decode_add_sub_imm(insn, false, immediate, op);
    + }
    + }
    + else if (aarch64_insn_is_adds_imm(insn) ||
    + aarch64_insn_is_subs_imm(insn)) {
    + ADD_OP(op) {
    + decode_add_sub_imm(insn, true, immediate, op);
    + }
    + }
    + break;
    + case AARCH64_INSN_CLS_DP_REG:
    + if (aarch64_insn_is_mov_reg(insn)) {
    + enum aarch64_insn_register rd;
    + enum aarch64_insn_register rm;
    +
    + rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, insn);
    + rm = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RM, insn);
    + if (is_FP(rd) || is_FP(rm)) {
    + ADD_OP(op) {
    + make_add_op(rd, rm, 0, op);
    + }
    + }
    + }
    + break;
    default:
    break;
    }
    --
    2.17.1
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