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SubjectRe: [PATCH 2/3] net: ethernet: ti: am65-cpsw: Add support for QSGMII mode
On Tue, May 31, 2022 at 05:00:57PM +0530, Siddharth Vadapalli wrote:
> static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode,
> const struct phylink_link_state *state)
> {
> - /* Currently not used */
> + struct am65_cpsw_slave_data *slave = container_of(config, struct am65_cpsw_slave_data,
> + phylink_config);
> + struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave);
> +
> + if (state->interface == PHY_INTERFACE_MODE_QSGMII)
> + writel(AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE,
> + port->sgmii_base + AM65_CPSW_SGMII_CONTROL_REG);

What about writing this register when the interface mode isn't QSGMII?

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