Messages in this thread | | | Date | Sat, 30 Apr 2022 10:19:03 +0900 | From | Stafford Horne <> | Subject | Re: [PATCH v7 11/17] openrisc: account for 0 starting value in random_get_entropy() |
| |
Hi Jason,
On Fri, Apr 29, 2022 at 02:16:48AM +0200, Jason A. Donenfeld wrote: > As a sanity check, this series makes sure that during early boot, the > cycle counter isn't returning all zeros. However, OpenRISC's TTCR timer > can be rather slow and starts out as zero during stages of early boot. > We know it works, however. So just always add 1 to random_get_entropy() > so that it doesn't trigger these checks.
Just one nit, you might want to qualify that this is related to simulators/qemu: * "However, in simulators OpenRISC's TTCR timer can be rather slow..."
> Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: Jonas Bonn <jonas@southpole.se> > Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> > Acked-by: Stafford Horne <shorne@gmail.com> > Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> > --- > Changes v6->v7: > - Add 1 to cycle counter to account for functional but slow-to-begin > counter on QEMU. > > arch/openrisc/include/asm/timex.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/openrisc/include/asm/timex.h b/arch/openrisc/include/asm/timex.h > index d52b4e536e3f..a78a5807c927 100644 > --- a/arch/openrisc/include/asm/timex.h > +++ b/arch/openrisc/include/asm/timex.h > @@ -23,6 +23,9 @@ static inline cycles_t get_cycles(void) > { > return mfspr(SPR_TTCR); > } > +#define get_cycles get_cycles > + > +#define random_get_entropy() ((unsigned long)get_cycles() + 1) > > /* This isn't really used any more */ > #define CLOCK_TICK_RATE 1000
Thanks,
-Stafford
| |