Messages in this thread | | | From | <> | Subject | Re: [RESEND PATCH] mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check() | Date | Wed, 27 Apr 2022 07:14:09 +0000 |
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On 4/27/22 10:11, Tudor Ambarus wrote: > On 1/31/22 19:19, Pratyush Yadav wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 26/01/22 03:32PM, Chen-Tsung Hsieh wrote: >>> Read back Status Register 1 to ensure that the written byte match the >>> received value and return -EIO if read back test failed. >>> >>> Without this patch, spi_nor_write_16bit_sr_and_check() only check the >>> second half of the 16bit. It causes errors like spi_nor_sr_unlock() >>> return success incorrectly when spi_nor_write_16bit_sr_and_check() >>> doesn't write SR successfully. >>>
cc to stable please
>>> Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()") >>> Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org> >> >> I don't know much about this bit of code but this patch looks fine to me >> from the surface. Would be nice to hear from Tudor about this too since >> he added the function. > > Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> >> >> Acked-by: Pratyush Yadav <p.yadav@ti.com>
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