Messages in this thread | | | Date | Mon, 18 Apr 2022 15:52:36 +0530 | Subject | Re: [PATCH v12 6/7] pinctrl: qcom: Add SC7280 lpass pin configuration | From | Srinivasa Rao Mandadapu <> |
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On 4/16/2022 5:00 AM, Matthias Kaehlcke wrote: Thanks for your time Matthias!!! > On Wed, Mar 16, 2022 at 09:47:05PM +0530, Srinivasa Rao Mandadapu wrote: >> Add pin control support for SC7280 LPASS LPI. >> >> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> >> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> >> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> >> ... >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> new file mode 100644 >> index 0000000..d67ff25 >> --- /dev/null >> +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> >> ... >> +/* sc7280 variant specific data */ > nit: the comment is a bit redundant in a sc7280 specific driver Okay. will remove it. > >> +static const struct pinctrl_pin_desc sc7280_lpi_pins[] = { >> + PINCTRL_PIN(0, "gpio0"), >> + PINCTRL_PIN(1, "gpio1"), >> + PINCTRL_PIN(2, "gpio2"), >> + PINCTRL_PIN(3, "gpio3"), >> + PINCTRL_PIN(4, "gpio4"), >> + PINCTRL_PIN(5, "gpio5"), >> + PINCTRL_PIN(6, "gpio6"), >> + PINCTRL_PIN(7, "gpio7"), >> + PINCTRL_PIN(8, "gpio8"), >> + PINCTRL_PIN(9, "gpio9"), >> + PINCTRL_PIN(10, "gpio10"), >> + PINCTRL_PIN(11, "gpio11"), >> + PINCTRL_PIN(12, "gpio12"), >> + PINCTRL_PIN(13, "gpio13"), >> + PINCTRL_PIN(14, "gpio14"), >> +}; >> + > Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
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