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SubjectRe: [PATCH v2 1/8] dt-bindings: pinctrl: mvebu: Document bindings for AC5
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On 17/03/2022 15:14, Andrew Lunn wrote:
>> What do you mean "driver fails to load"? You control the driver, don't
>> you?
>
> It is a thin wrapper around the mvebu driver, which does all the real
> work. So no, Chris does not really control what the core of the driver
> does.

This this design still require a pinctrl to be a child of some node?

>
> The existing binding documentation says:
>
> * Marvell Armada 37xx SoC pin and gpio controller
>
> Each Armada 37xx SoC come with two pin and gpio controller one for
> the south bridge and the other for the north bridge.
>
> Inside this set of register the gpio latch allows exposing some
> configuration of the SoC and especially the clock frequency of the
> xtal. Hence, this node is a represent as syscon allowing sharing
> the register between multiple hardware block.
>
>
> So the syscon is there to allow the clock driver to share the register
> space.


This makes sense. Solution here would be to add syscon compatible to
pinctrl node. This parent simple-mfd+syscon node looks like a workaround
to share some registers in a highly flexible way. However isn't it
better to have more obvious owner of the register space (e.g. pinctrl)?
IOW, if there is only one child of syscon+simple-mfd node, why not
getting rid of it and making pinctrl owner of this address space? It's
also simpler code.


Best regards,
Krzysztof

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