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    Subject[tip: x86/core] x86/text-patching: Make text_gen_insn() play nice with ANNOTATE_NOENDBR
    The following commit has been merged into the x86/core branch of tip:

    Commit-ID: bbf92368b0b1fe472d489e62d3340d7897e9c697
    Gitweb: https://git.kernel.org/tip/bbf92368b0b1fe472d489e62d3340d7897e9c697
    Author: Peter Zijlstra <peterz@infradead.org>
    AuthorDate: Tue, 08 Mar 2022 16:30:19 +01:00
    Committer: Peter Zijlstra <peterz@infradead.org>
    CommitterDate: Tue, 15 Mar 2022 10:32:33 +01:00

    x86/text-patching: Make text_gen_insn() play nice with ANNOTATE_NOENDBR

    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
    Link: https://lore.kernel.org/r/20220308154317.638561109@infradead.org
    ---
    arch/x86/include/asm/text-patching.h | 10 +++++++++-
    1 file changed, 9 insertions(+), 1 deletion(-)

    diff --git a/arch/x86/include/asm/text-patching.h b/arch/x86/include/asm/text-patching.h
    index b742178..1c4cfb1 100644
    --- a/arch/x86/include/asm/text-patching.h
    +++ b/arch/x86/include/asm/text-patching.h
    @@ -101,13 +101,21 @@ void *text_gen_insn(u8 opcode, const void *addr, const void *dest)
    static union text_poke_insn insn; /* per instance */
    int size = text_opcode_size(opcode);

    + /*
    + * Hide the addresses to avoid the compiler folding in constants when
    + * referencing code, these can mess up annotations like
    + * ANNOTATE_NOENDBR.
    + */
    + OPTIMIZER_HIDE_VAR(addr);
    + OPTIMIZER_HIDE_VAR(dest);
    +
    insn.opcode = opcode;

    if (size > 1) {
    insn.disp = (long)dest - (long)(addr + size);
    if (size == 2) {
    /*
    - * Ensure that for JMP9 the displacement
    + * Ensure that for JMP8 the displacement
    * actually fits the signed byte.
    */
    BUG_ON((insn.disp >> 31) != (insn.disp >> 7));
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