Messages in this thread Patch in this message | | | From | Jacob Pan <> | Subject | [PATCH v2 2/8] iommu: Add attach/detach_dev_pasid domain ops | Date | Mon, 14 Mar 2022 22:07:06 -0700 |
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From: Lu Baolu <baolu.lu@linux.intel.com>
An IOMMU domain represents an address space which can be attached by devices that perform DMA within a domain. However, for platforms with PASID capability the domain attachment needs be handled at device+PASID level. There can be multiple PASIDs within a device and multiple devices attached to a given domain. This patch introduces a new IOMMU op which support device, PASID, and IOMMU domain attachment. The immediate use case is for PASID capable devices to perform DMA under DMA APIs.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> --- include/linux/iommu.h | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 369f05c2a4e2..fde5b933dbe3 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -227,6 +227,8 @@ struct iommu_iotlb_gather { * @aux_get_pasid: get the pasid given an aux-domain * @sva_bind: Bind process address space to device * @sva_unbind: Unbind process address space from device + * @attach_dev_pasid: attach an iommu domain to a pasid of device + * @detach_dev_pasid: detach an iommu domain from a pasid of device * @sva_get_pasid: Get PASID associated to a SVA handle * @page_response: handle page request response * @cache_invalidate: invalidate translation caches @@ -296,6 +298,10 @@ struct iommu_ops { struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm, void *drvdata); void (*sva_unbind)(struct iommu_sva *handle); + int (*attach_dev_pasid)(struct iommu_domain *domain, + struct device *dev, ioasid_t id); + void (*detach_dev_pasid)(struct iommu_domain *domain, + struct device *dev, ioasid_t id); u32 (*sva_get_pasid)(struct iommu_sva *handle); int (*page_response)(struct device *dev, -- 2.25.1
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