Messages in this thread | | | Date | Thu, 10 Mar 2022 16:40:45 +0000 | From | <> | Subject | Re: [PATCH v3 01/16] sound: cs35l41: Unify hardware configuration |
| |
On 3/10/22 1:44 PM, Takashi Iwai <tiwai@suse.de> wrote: > On Tue, 08 Mar 2022 18:17:15 +0100, > Lucas Tanure wrote: > > +enum cs35l41_gpio_func { > > + CS35L41_HIZ, > > + CS35L41_GPIO, > > + CS35L41_INT_OPEN_DRAIN_GPIO2, > > + CS35L41_MCLK, > > + CS35L41_INT_PUSH_PULL_LOW_GPIO2, > > + CS35L41_INT_PUSH_PULL_HIGH_GPIO2, > > + CS35L41_PDM_CLK_GPIO2, > > + CS35L41_PDM_DATA_GPIO2, > > + CS35L41_MDSYNC_GPIO1 = 2, > > + CS35L41_PDM_CLK_GPIO1 = 4, > > + CS35L41_PDM_DATA_GPIO1 = 5, > > }; > > So CS35L41_MDSYNC_GPIO1 is identical with *_DRAIN_GPIO2, i.e. it's an > alias? > > > thanks, > > Takashi >
The value 2 sets GPIO1 as MDSYNC pin and GPIO2 as IRQ pin (Open drain). It could be the same label, like CS35L41_GPIO1_MDSYNC_GPIO2_IRQ, but I think separating them is better for understanding the code and organizing the code.
| |