Messages in this thread Patch in this message | | | From | Jean-Jacques Hiblot <> | Subject | [PATCH v3 3/5] ARM: dts: r9a06g032: Add the watchdog nodes | Date | Mon, 21 Feb 2022 10:50:29 +0100 |
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This SOC includes 2 watchdog controllers (one per A7 core).
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com> --- arch/arm/boot/dts/r9a06g032.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index c47896e4ab58..c619ba194281 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -66,6 +66,22 @@ soc { interrupt-parent = <&gic>; ranges; + wdt0: watchdog@40008000 { + compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; + reg = <0x40008000 0x1000>; + interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + + wdt1: watchdog@40009000 { + compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; + reg = <0x40009000 0x1000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + sysctrl: system-controller@4000c000 { compatible = "renesas,r9a06g032-sysctrl"; reg = <0x4000c000 0x1000>; -- 2.25.1
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