Messages in this thread | | | Date | Tue, 15 Feb 2022 16:40:03 +0000 | From | Sean Christopherson <> | Subject | Re: [PATCH 09/11] KVM: x86: Treat x2APIC's ICR as a 64-bit register, not two 32-bit regs |
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On Tue, Feb 15, 2022, Chao Gao wrote: > > case APIC_SELF_IPI: > >- if (apic_x2apic_mode(apic)) { > >- kvm_lapic_reg_write(apic, APIC_ICR, > >- APIC_DEST_SELF | (val & APIC_VECTOR_MASK)); > >- } else > >+ if (apic_x2apic_mode(apic)) > >+ kvm_x2apic_icr_write(apic, APIC_DEST_SELF | (val & APIC_VECTOR_MASK)); > >+ else > > The original code looks incorrect. Emulating writes to SELF_IPI by writes to > ICR has an unwanted side-effect: the value of ICR in vAPIC page gets changed. > > It is better to use kvm_apic_send_ipi() directly.
Agreed, the SDM lists SELF_IPI as write-only, with no associated MMIO offset, so it should have no visible side effect in the vAPIC. I'll add a patch to fix this.
Thanks!
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