lkml.org 
[lkml]   [2022]   [Dec]   [5]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH v4 12/23] phy: qcom-qmp-ufs: Add HS G4 mode support to SC8280XP SoC


    On 1 December 2022 20:43:17 GMT+03:00, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote:
    >UFS PHY in SC8280XP SoC is capable of operating at HS G4 mode and the init
    >sequence is compatible with SM8350. Hence, add the tbls_hs_g4 instance
    >reusing the G4 init sequence of SM8350.
    >
    >Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

    Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>


    >---
    > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 8 ++++++++
    > 1 file changed, 8 insertions(+)
    >
    >diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
    >index 96e03d4249da..9f5526758985 100644
    >--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
    >+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
    >@@ -763,6 +763,14 @@ static const struct qmp_phy_cfg sc8280xp_ufsphy_cfg = {
    > .serdes = sm8350_ufsphy_hs_b_serdes,
    > .serdes_num = ARRAY_SIZE(sm8350_ufsphy_hs_b_serdes),
    > },
    >+ .tbls_hs_g4 = {
    >+ .tx = sm8350_ufsphy_g4_tx,
    >+ .tx_num = ARRAY_SIZE(sm8350_ufsphy_g4_tx),
    >+ .rx = sm8350_ufsphy_g4_rx,
    >+ .rx_num = ARRAY_SIZE(sm8350_ufsphy_g4_rx),
    >+ .pcs = sm8350_ufsphy_g4_pcs,
    >+ .pcs_num = ARRAY_SIZE(sm8350_ufsphy_g4_pcs),
    >+ },
    > .clk_list = sdm845_ufs_phy_clk_l,
    > .num_clks = ARRAY_SIZE(sdm845_ufs_phy_clk_l),
    > .vreg_list = qmp_phy_vreg_l,

    --
    With best wishes
    Dmitry

    \
     
     \ /
      Last update: 2022-12-05 22:57    [W:4.275 / U:0.004 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site