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SubjectRe: [PATCH v8 01/11] dt-bindings: clock: meson: add A1 PLL clock controller bindings
On Fri, Dec 02, 2022 at 12:11:53PM +0100, Jerome Brunet wrote:
>
> On Fri 02 Dec 2022 at 01:56, Dmitry Rokosov <ddrokosov@sberdevices.ru> wrote:
>
> > From: Jian Hu <jian.hu@amlogic.com>
> >
> > Add the documentation to support Amlogic A1 PLL clock driver,
> > and add A1 PLL clock controller bindings.
> >
> > Signed-off-by: Jian Hu <jian.hu@amlogic.com>
> > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> > ---
> > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 52 +++++++++++++++++++
> > include/dt-bindings/clock/a1-pll-clkc.h | 16 ++++++
> > 2 files changed, 68 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h
> >
> > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > new file mode 100644
> > index 000000000000..d67250fbeece
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > @@ -0,0 +1,52 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/amlogic,a1-pll-clkc.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Amlogic Meson A/C serials PLL Clock Control Unit Device Tree Bindings
> > +
> > +maintainers:
> > + - Neil Armstrong <narmstrong@baylibre.com>
> > + - Jerome Brunet <jbrunet@baylibre.com>
> > + - Jian Hu <jian.hu@jian.hu.com>
> > +
> > +properties:
> > + compatible:
> > + const: amlogic,a1-pll-clkc
> > +
> > + "#clock-cells":
> > + const: 1
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: input xtal_fixpll
> > + - description: input xtal_hifipll
> > +
> > + clock-names:
> > + items:
> > + - const: xtal_fixpll
> > + - const: xtal_hifipll
>
> Do we really need the "xtal_" prefix ?
>
> Seems like the clock is the PLL, not the xtal
>

This name was formed from specification registers description. Register
CLKTREE_SYS_OSCIN_CTRL has "gate en" field which calls "xtal ->
HIFIPLL", therefore if was transformed to xtal_hifipll name.

But I agree with you, that "hifipll" is better name choice.

--
Thank you,
Dmitry

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