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    Subject[PATCH v3 04/15] arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks
    Date
    The LLCC block has several banks each with a different base address
    and holes in between. So it is not a correct approach to cover these
    banks with a single offset/size. Instead, the individual bank's base
    address needs to be specified in devicetree with the exact size.

    On SC7180, there is only one LLCC bank available. So let's just pass that
    as "llcc0_base".

    Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
    Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
    ---
    arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
    index f71cf21a8dd8..f861f692c9b1 100644
    --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
    @@ -2759,7 +2759,7 @@ dc_noc: interconnect@9160000 {
    system-cache-controller@9200000 {
    compatible = "qcom,sc7180-llcc";
    reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>;
    - reg-names = "llcc_base", "llcc_broadcast_base";
    + reg-names = "llcc0_base", "llcc_broadcast_base";
    interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
    };

    --
    2.25.1
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