Messages in this thread Patch in this message |  | | From | Xingyu Wu <> | Subject | [PATCH v2 1/3] dt-bindings: watchdog: Add watchdog for StarFive JH7110 | Date | Mon, 19 Dec 2022 17:42:31 +0800 |
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Add bindings to describe the watchdog for the StarFive JH7110 SoC.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- .../watchdog/starfive,jh7110-wdt.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/starfive,jh7110-wdt.yaml
diff --git a/Documentation/devicetree/bindings/watchdog/starfive,jh7110-wdt.yaml b/Documentation/devicetree/bindings/watchdog/starfive,jh7110-wdt.yaml new file mode 100644 index 000000000000..a7bfe0751928 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/starfive,jh7110-wdt.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/starfive,jh7110-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Watchdog + +maintainers: + - Samin Guo <samin.guo@starfivetech.com> + - Xingyu Wu <xingyu.wu@starfivetech.com> + +properties: + compatible: + const: starfive,jh7110-wdt + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: APB clock + - description: Core clock + + clock-names: + items: + - const: apb + - const: core + + resets: + items: + - description: APB reset + - description: Core reset + + reset-names: + items: + - const: apb + - const: core + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + watchdog@13070000 { + compatible = "starfive,jh7110-wdt"; + reg = <0x13070000 0x10000>; + clocks = <&clk 122>, + <&clk 123>; + clock-names = "apb", "core"; + resets = <&rst 109>, + <&rst 110>; + reset-names = "apb", "core"; + }; -- 2.25.1
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