Messages in this thread Patch in this message |  | | From | Lukasz Majewski <> | Subject | [PATCH v2 1/3] dsa: marvell: Provide per device information about max frame size | Date | Thu, 15 Dec 2022 15:45:34 +0100 |
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Different Marvell DSA switches support different size of max frame bytes to be sent.
For example mv88e6185 supports max 1632 bytes, which is now in-driver standard value. On the other hand - mv88e6250 supports 2048 bytes.
As this value is internal and may be different for each switch IC, new entry in struct mv88e6xxx_info has been added to store it.
Signed-off-by: Lukasz Majewski <lukma@denx.de> --- Changes for v2: - Define max_frame_size with default value of 1632 bytes, - Set proper value for the mv88e6250 switch SoC (linkstreet) family --- drivers/net/dsa/mv88e6xxx/chip.c | 13 ++++++++++++- drivers/net/dsa/mv88e6xxx/chip.h | 1 + 2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 2ca3cbba5764..7ae4c389ce50 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3093,7 +3093,9 @@ static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port) if (chip->info->ops->port_set_jumbo_size) return 10240 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; else if (chip->info->ops->set_max_frame_size) - return 1632 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; + return (chip->info->max_frame_size - VLAN_ETH_HLEN + - EDSA_HLEN - ETH_FCS_LEN); + return 1522 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; } @@ -4461,6 +4463,7 @@ static const struct mv88e6xxx_ops mv88e6250_ops = { .avb_ops = &mv88e6352_avb_ops, .ptp_ops = &mv88e6250_ptp_ops, .phylink_validate = mv88e6065_phylink_validate, + .set_max_frame_size = mv88e6185_g1_set_max_frame_size, }; static const struct mv88e6xxx_ops mv88e6290_ops = { @@ -5060,6 +5063,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .atu_move_port_mask = 0xf, .multi_chip = true, .ops = &mv88e6095_ops, + .max_frame_size = 1632, }, [MV88E6097] = { @@ -5083,6 +5087,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .multi_chip = true, .edsa_support = MV88E6XXX_EDSA_SUPPORTED, .ops = &mv88e6097_ops, + .max_frame_size = 1632, }, [MV88E6123] = { @@ -5106,6 +5111,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .multi_chip = true, .edsa_support = MV88E6XXX_EDSA_SUPPORTED, .ops = &mv88e6123_ops, + .max_frame_size = 1632, }, [MV88E6131] = { @@ -5174,6 +5180,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .edsa_support = MV88E6XXX_EDSA_SUPPORTED, .ptp_support = true, .ops = &mv88e6161_ops, + .max_frame_size = 1632, }, [MV88E6165] = { @@ -5197,6 +5204,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .multi_chip = true, .ptp_support = true, .ops = &mv88e6165_ops, + .max_frame_size = 1632, }, [MV88E6171] = { @@ -5312,6 +5320,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .multi_chip = true, .edsa_support = MV88E6XXX_EDSA_SUPPORTED, .ops = &mv88e6185_ops, + .max_frame_size = 1632, }, [MV88E6190] = { @@ -5440,6 +5449,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 2, .invalid_port_mask = BIT(2) | BIT(3) | BIT(4), .max_vid = 4095, + .max_frame_size = 2048, .port_base_addr = 0x08, .phy_base_addr = 0x00, .global1_addr = 0x0f, @@ -5486,6 +5496,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_ports = 7, .num_internal_phys = 5, .max_vid = 4095, + .max_frame_size = 2048, .port_base_addr = 0x08, .phy_base_addr = 0x00, .global1_addr = 0x0f, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 80dc7b549e81..9712b10fc4ed 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -130,6 +130,7 @@ struct mv88e6xxx_info { unsigned int num_internal_phys; unsigned int num_gpio; unsigned int max_vid; + unsigned int max_frame_size; unsigned int port_base_addr; unsigned int phy_base_addr; unsigned int global1_addr; -- 2.37.3
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