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SubjectRe: [PATCH] Revert "phy: qualcomm: usb28nm: Add MDM9607 init sequence"
On 14/12/2022 22:37, Marijn Suijten wrote:
> This reverts commit 557a28811c7e0286d3816842032db5eb7bb5f156.
> This commit introduced an init sequence from downstream DT [1] in the
> driver. As mentioned by the comment above the HSPHY_INIT_CFG macro for
> this sequence:
> /*
> * The macro is used to define an initialization sequence. Each tuple
> * is meant to program 'value' into phy register at 'offset' with 'delay'
> * in us followed.
> */
> Instead of corresponding to offsets into the phy register, the sequence
> read by the downstream driver [2] is passed into ulpi_write [3] which
> crafts the address-value pair into a new value and writes it into the
> same register at USB_ULPI_VIEWPORT [4]. In other words, this init
> sequence is programmed into the hardware in a totally different way than
> downstream and is unlikely to achieve the desired result, if the hsphy
> is working at all.
> An alternative method needs to be found to write these init values at
> the desired location. Fortunately mdm9607 did not land upstream yet [5]
> and should have its compatible revised to use the generic one, instead
> of a compatible that writes wrong data to the wrong registers.
> [1]:
> [2]:
> [3]:
> [4]:
> [5]:
> Reported-by: Michael Srba <>
> Signed-off-by: Marijn Suijten <>


I got a bit concerned qcs405 was broken too, which would be worrying
since I remember testing this code, though not specifically turning off
the PHY init, then again, there's a near zero chance the USB PHY would
work after reset without the specified init seq.

The original upstreamed code for qcs404/405

Does a relative write to an offset of the PHY CSR

CSR base is 0x7a000

which will result in 0x7a000 + 0xc0 = 0x01, etc

which for us upstream then is


Writing 0x7a000 + 0xc0 = 0x01, etc - a writel() in this case

so that bit is fine.

- compat string is

CSR is @ 0x6c000

downstream PHY init seq

and downstream driver PHY init write

Which does

writel_relaxed(ULPI_RUN | ULPI_WRITE |
ULPI_ADDR(reg) | ULPI_DATA(val),

Yep, you're right, we can't do a simple writeb(csr + reg, val); for
mdm9607 but, also the qcs404 => compat = "qcom,usb-hs-28nm-femtophy" is
doing the right thing.

Reviewed-by: Bryan O'Donoghue <>

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