Messages in this thread |  | | Date | Wed, 14 Dec 2022 18:18:06 +0200 | From | Andy Shevchenko <> | Subject | Re: [PATCH v2 1/1] i2c: designware: use u64 for clock freq to avoid u32 multiplication overflow |
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On Wed, Dec 14, 2022 at 06:12:12PM +0200, Andy Shevchenko wrote: > On Wed, Dec 14, 2022 at 03:41:17PM +0000, Hanna Hawa wrote: > > From: Lareine Khawaly <lareine@amazon.com> > > > > In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow > > by depending on the values of the given parameters including the ic_clk. > > For example in our use case where ic_clk is larger than one million, > > multiplication of ic_clk * 4700 will result in 32 bit overflow. > > > > Make the ic_clk to be u64 parameter to avoid the overflow. > > Below my comment, after addressing it, > Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Sorry, was too quick. I have to withdraw my tag since this patch obviously breaks a compilation for Intel Quark chip.
Please, test it carefully and submit new version when it will be ready.
-- With Best Regards, Andy Shevchenko
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