Messages in this thread | | | From | Conor Dooley <> | Subject | [PATCH 0/2] riscv,isa fixups | Date | Thu, 24 Nov 2022 13:04:39 +0000 |
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I noticed today while looking at the isa manual that I had not accounted for another couple of edge cases with my regex. As before, I think attempting to validate the canonical order for multiletter stuff makes no sense - but we should totally try to avoid false-positives for combinations that are known to be valid.
Thanks, Conor.
CC: Conor Dooley <conor@kernel.org> CC: Rob Herring <robh+dt@kernel.org> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: Paul Walmsley <paul.walmsley@sifive.com> CC: Palmer Dabbelt <palmer@dabbelt.com> CC: Albert Ou <aou@eecs.berkeley.edu> CC: Heiko Stuebner <heiko@sntech.de> CC: Andrew Jones <ajones@ventanamicro.com> CC: Guo Ren <guoren@kernel.org> CC: linux-riscv@lists.infradead.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org
Conor Dooley (2): dt-bindings: riscv: fix underscore requirement for addtional standard extensions dt-bindings: riscv: fix single letter canonical order
Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
-- 2.38.1
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