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    Subject[patch V3 17/33] x86/apic/msi: Remove arch_create_remap_msi_irq_domain()
    Date
    and related code which is not longer required now that the interrupt remap
    code has been converted to MSI parent domains.

    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    ---
    arch/x86/include/asm/irq_remapping.h | 4 ---
    arch/x86/kernel/apic/msi.c | 42 -----------------------------------
    2 files changed, 1 insertion(+), 45 deletions(-)

    --- a/arch/x86/include/asm/irq_remapping.h
    +++ b/arch/x86/include/asm/irq_remapping.h
    @@ -44,10 +44,6 @@ extern int irq_remapping_reenable(int);
    extern int irq_remap_enable_fault_handling(void);
    extern void panic_if_irq_remap(const char *msg);

    -/* Create PCI MSI/MSIx irqdomain, use @parent as the parent irqdomain. */
    -extern struct irq_domain *
    -arch_create_remap_msi_irq_domain(struct irq_domain *par, const char *n, int id);
    -
    /* Get parent irqdomain for interrupt remapping irqdomain */
    static inline struct irq_domain *arch_get_ir_parent_domain(void)
    {
    --- a/arch/x86/kernel/apic/msi.c
    +++ b/arch/x86/kernel/apic/msi.c
    @@ -277,7 +277,7 @@ void __init x86_create_pci_msi_domain(vo
    x86_pci_msi_default_domain = x86_init.irqs.create_pci_msi_domain();
    }

    -/* Keep around for hyperV and the remap code below */
    +/* Keep around for hyperV */
    int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
    msi_alloc_info_t *arg)
    {
    @@ -291,46 +291,6 @@ int pci_msi_prepare(struct irq_domain *d
    }
    EXPORT_SYMBOL_GPL(pci_msi_prepare);

    -#ifdef CONFIG_IRQ_REMAP
    -static struct msi_domain_ops pci_msi_domain_ops = {
    - .msi_prepare = pci_msi_prepare,
    -};
    -
    -static struct irq_chip pci_msi_ir_controller = {
    - .name = "IR-PCI-MSI",
    - .irq_unmask = pci_msi_unmask_irq,
    - .irq_mask = pci_msi_mask_irq,
    - .irq_ack = irq_chip_ack_parent,
    - .irq_retrigger = irq_chip_retrigger_hierarchy,
    - .flags = IRQCHIP_SKIP_SET_WAKE |
    - IRQCHIP_AFFINITY_PRE_STARTUP,
    -};
    -
    -static struct msi_domain_info pci_msi_ir_domain_info = {
    - .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
    - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
    - .ops = &pci_msi_domain_ops,
    - .chip = &pci_msi_ir_controller,
    - .handler = handle_edge_irq,
    - .handler_name = "edge",
    -};
    -
    -struct irq_domain *arch_create_remap_msi_irq_domain(struct irq_domain *parent,
    - const char *name, int id)
    -{
    - struct fwnode_handle *fn;
    - struct irq_domain *d;
    -
    - fn = irq_domain_alloc_named_id_fwnode(name, id);
    - if (!fn)
    - return NULL;
    - d = pci_msi_create_irq_domain(fn, &pci_msi_ir_domain_info, parent);
    - if (!d)
    - irq_domain_free_fwnode(fn);
    - return d;
    -}
    -#endif
    -
    #ifdef CONFIG_DMAR_TABLE
    /*
    * The Intel IOMMU (ab)uses the high bits of the MSI address to contain the
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