Messages in this thread | | | From | Emil Renner Berthing <> | Date | Mon, 21 Nov 2022 12:38:17 +0100 | Subject | Re: [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator |
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On Mon, 21 Nov 2022 at 09:49, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 18/11/2022 02:06, Hal Feng wrote: > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > Add bindings for the always-on clock and reset generator (AONCRG) on the > > JH7110 RISC-V SoC by StarFive Ltd. > > > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > > --- > > .../clock/starfive,jh7110-aoncrg.yaml | 76 +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > new file mode 100644 > > index 000000000000..afbb205e294f > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > @@ -0,0 +1,76 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: StarFive JH7110 Always-On Clock and Reset Generator > > + > > +maintainers: > > + - Emil Renner Berthing <kernel@esmil.dk> > > + > > +properties: > > + compatible: > > + const: starfive,jh7110-aoncrg > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: Main Oscillator > > + - description: RTC clock > > Real Time Clock clock? :) I don't think the input to clock controller is > the output of RTC...
The description is bad, but even the documentation calls it "clk_rtc" even though it's really an optional input from a 32k oscillator.
> Best regards, > Krzysztof >
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