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SubjectRe: [PATCH 0/3] PCI/ASPM: Fix L1SS issues
On Tue, Oct 04, 2022 at 08:28:07PM -0700, Sathyanarayanan Kuppuswamy wrote:
> On 10/4/22 7:58 PM, Bjorn Helgaas wrote:
> > From: Bjorn Helgaas <bhelgaas@google.com>
> >
> > This is really late, but I think we have two significant issues with L1SS:
> >
> > 1) pcie_aspm_cap_init() reads from the L1SS capability even when it
> > doesn't exist, so it reads PCI_COMMAND and PCI_STATUS instead and treats
> > those as an L1SS Capability value.
> >
> > 2) encode_l12_threshold() encodes LTR_L1.2_THRESHOLD as smaller than
> > requested, so ports may enter L1.2 when they should not.
> >
> > These patches are intended to fix both issues.
>
> Looks good to me.
>
> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

Thanks a lot for taking a look at these! I put them on pci/aspm for
v6.1.

> > Bjorn Helgaas (3):
> > PCI/ASPM: Factor out L1 PM Substates configuration
> > PCI/ASPM: Ignore L1 PM Substates if device lacks capability
> > PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation
> >
> > drivers/pci/pcie/aspm.c | 155 +++++++++++++++++++++++-----------------
> > 1 file changed, 90 insertions(+), 65 deletions(-)
> >
>
> --
> Sathyanarayanan Kuppuswamy
> Linux Kernel Developer

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