Messages in this thread | | | Date | Tue, 4 Oct 2022 19:42:09 +0200 | Subject | Re: [PATCH] clk: qcom: gcc-sm6375: Ensure unsigned long type | From | Konrad Dybcio <> |
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On 04/10/2022 19:25, Stephen Boyd wrote: > This PLL frequency needs a UL postfix to avoid compiler warnings on > 32-bit architectures. > > Fixes: 184fdd873d83 ("clk: qcom: Add global clock controller driver for SM6375") > Cc: Konrad Dybcio <konrad.dybcio@somainline.org> > Signed-off-by: Stephen Boyd <sboyd@kernel.org> > ---
Not sure if this SoC can even boot 32bit kernels, however I like it for
the sake of correctness.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Konrad
> drivers/clk/qcom/gcc-sm6375.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/gcc-sm6375.c b/drivers/clk/qcom/gcc-sm6375.c > index a3188c462a8b..89a1cc90b145 100644 > --- a/drivers/clk/qcom/gcc-sm6375.c > +++ b/drivers/clk/qcom/gcc-sm6375.c > @@ -54,7 +54,7 @@ static struct pll_vco lucid_vco[] = { > }; > > static struct pll_vco zonda_vco[] = { > - { 595200000, 3600000000, 0 }, > + { 595200000, 3600000000UL, 0 }, > }; > > static struct clk_alpha_pll gpll0 = { > > base-commit: c3db5128e80e1437cb08d0d41aeb7163004897e7 > prerequisite-patch-id: eac168caa320346ed78dc95c27117106fc8dbc7f
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