Messages in this thread | | | From | Chen-Yu Tsai <> | Date | Mon, 24 Oct 2022 14:57:09 -0700 | Subject | Re: [PATCH 01/10] clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks |
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On Mon, Oct 24, 2022 at 3:23 AM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > Before this change, every mtk_fixed_factor clock forced clock flags to > CLK_SET_RATE_PARENT: while this is harmless in some cases, it may not > be desired in some others, especially when performing clock muxing on > a clock having multiple parents of which one is a dedicated PLL and the > others are not. > > This is especially seen on the GPU clocks on some SoCs, where we are > muxing between multiple parents: a fixed clock (crystal), a programmable > GPU PLL and one or more dividers for the MAINPLL, used for a number of > devices; it happens that when a rate change is called for the GPU, the > clock framework will try to satisfy the rate request by using one of the > MAINPLL dividers, which have CLK_SET_RATE_PARENT and will set the rate > on MAINPLL itself - overclocking or underclocking many devices in the > system - and making it to lock up. > > Logically, it should be harmless (and would only reduce possible bugs) > to change all of the univpll and mainpll related fixed factor clocks > to not declare the CLK_SET_RATE_PARENT by default but, on some SoCs, > this is also used for dividers of other PLLs for which a rate change > based on the divider may be desired, hence introduce a new FACTOR_FLAGS() > macro to use custom flags (or none) on selected fixed factor clocks. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
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