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SubjectRE: [PATCH v2 17/17] MAINTAINERS: update riscv/microchip entry
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On 17/12/2021 15:09, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know
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>
> On 17/12/2021 10:33, conor.dooley@microchip.com wrote:
>> From: Conor Dooley <conor.dooley@microchip.com>
>>
>> Update the RISC-V/Microchip entry by adding the microchip dts
>> directory and myself as maintainer
>>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lewis Hanly <lewis.hanly@microchip.com>
>> ---
>> MAINTAINERS | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS index
>> 7a2345ce8521..3b1d6be7bd56 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -16348,8 +16348,10 @@ K: riscv
>>
>> RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
>> M: Lewis Hanly <lewis.hanly@microchip.com>
>> +M: Conor Dooley <conor.dooley@microchip.com>
>> L: linux-riscv@lists.infradead.org
>> S: Supported
>> +F: arch/riscv/boot/dts/microchip/
>> F: drivers/mailbox/mailbox-mpfs.c
>> F: drivers/soc/microchip/
>> F: include/soc/microchip/mpfs.h
>>
>
> Good to have the DTS covered, so FWIW:
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>
> You still should get Lewis' ack (unless he merges it)
Aye, it'll be an ack. We don't currently have a tree & would rather do this via risc-v than the at91/sam arm soc tree.
>
> Best regards,
> Krzysztof
>

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