lkml.org 
[lkml]   [2022]   [Jan]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH V2 2/2] soc: s4: Add support for power domains controller
From
Date
Hi Shunzhou,

On 30/12/2021 23:15, Martin Blumenstingl wrote:
> On Thu, Dec 30, 2021 at 10:44 AM Shunzhou.Jiang
> <shunzhou.jiang@amlogic.com> wrote:
>>
>> From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
>>
>> Add support s4 Power controller. In s4, power control
>> registers are in secure domain, and should be accessed by smc.
>>
>> Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
> Also here I don't have any datasheet to compare this with, so this gets my:
> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>
> [...]
>> + SEC_PD(S4_VPU_HDMI, GENPD_FLAG_ALWAYS_ON),
>> + SEC_PD(S4_USB_COMB, GENPD_FLAG_ALWAYS_ON),
>> + SEC_PD(S4_GE2D, 0),
>> + SEC_PD(S4_ETH, GENPD_FLAG_ALWAYS_ON),
> For the A1 SoC's UART entry we have the following comment which
> explains why we want to to be "always on":
> UART should keep working in ATF after suspend and before resume
>
> If for some reason you need to re-send this series then it would be
> great if you could add a comment above each entry with
> GENPD_FLAG_ALWAYS_ON.
> It will help others (like me) understand these SoCs better.

Can you resend with those comments added so I can apply the patches ?

Thanks,
Neil

>
>
> Best regards,
> Martin
>

\
 
 \ /
  Last update: 2022-01-12 09:37    [W:0.038 / U:0.120 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site