Messages in this thread | | | Date | Tue, 28 Sep 2021 19:06:10 +0800 | From | kernel test robot <> | Subject | drivers/crypto/nintendo-aes.c:72: Error: unrecognised instruction dcbf |
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tree: https://github.com/0day-ci/linux/commits/Emmanuel-Gil-Peyrot/crypto-nintendo-aes-add-a-new-AES-driver/20210922-122123 head: 27d5ea5f78903c9d07dacbbb1eceae4fb23ed601 commit: e2320d1d64125b864ed1e2d1a33b4b07801ddd33 crypto: nintendo-aes - add a new AES driver date: 6 days ago config: nios2-allyesconfig (attached as .config) compiler: nios2-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/e2320d1d64125b864ed1e2d1a33b4b07801ddd33 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Emmanuel-Gil-Peyrot/crypto-nintendo-aes-add-a-new-AES-driver/20210922-122123 git checkout e2320d1d64125b864ed1e2d1a33b4b07801ddd33 # save the attached .config to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=nios2 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/crypto/nintendo-aes.c: Assembler messages: >> drivers/crypto/nintendo-aes.c:72: Error: unrecognised instruction dcbf >> drivers/crypto/nintendo-aes.c:94: Error: unrecognised instruction dcbi
vim +72 drivers/crypto/nintendo-aes.c
61 62 static int 63 do_crypt(const void *src, void *dst, u32 len, u32 flags) 64 { 65 u32 blocks = ((len >> 4) - 1) & AES_CTRL_BLOCK; 66 u32 status; 67 u32 counter = OP_TIMEOUT; 68 u32 i; 69 70 /* Flush out all of src, we can’t know whether any of it is in cache */ 71 for (i = 0; i < len; i += 32) > 72 __asm__("dcbf 0, %0" : : "r" (src + i)); 73 __asm__("sync" : : : "memory"); 74 75 /* Set the addresses for DMA */ 76 iowrite32be(virt_to_phys((void *)src), base + AES_SRC); 77 iowrite32be(virt_to_phys(dst), base + AES_DEST); 78 79 /* Start the operation */ 80 iowrite32be(flags | blocks, base + AES_CTRL); 81 82 /* TODO: figure out how to use interrupts here, this will probably 83 * lower throughput but let the CPU do other things while the AES 84 * engine is doing its work. */ 85 do { 86 status = ioread32be(base + AES_CTRL); 87 cpu_relax(); 88 } while ((status & AES_CTRL_EXEC) && --counter); 89 90 /* Do we ever get called with dst ≠ src? If so we have to invalidate 91 * dst in addition to the earlier flush of src. */ 92 if (unlikely(dst != src)) { 93 for (i = 0; i < len; i += 32) > 94 __asm__("dcbi 0, %0" : : "r" (dst + i)); 95 __asm__("sync" : : : "memory"); 96 } 97 98 return counter ? 0 : 1; 99 } 100
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