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SubjectRe: [PATCH V1] arm64: dts: qcom: sc7180: Use maximum drive strength values for eMMC
Bjorn,

On Thu, Aug 19, 2021 at 6:44 AM Doug Anderson <dianders@google.com> wrote:
>
> Hi,
>
> On Tue, Aug 17, 2021 at 6:58 AM Doug Anderson <dianders@google.com> wrote:
> >
> > > pinconf-data {
> > > pins = "sdc1_data";
> > > bias-pull-up;
> > > - drive-strength = <10>;
> > > + drive-strength = <16>;
> >
> > I could be convinced that this is the right thing to do, but I want to
> > really make sure that it has had sufficient testing. Specifically as
> > this patch is written we'll be updating the drive strength for all
> > boards. Increasing the drive strength can sometimes introduce new
> > problems (reflections, noise, ...) so we have to be confident that
> > we're not breaking someone that used to work by increasing the drive
> > strength here. How much has this been tested?
>
> From further discussion internally, it sounds as if this should be
> fine and fixes more than just this one eMMC part. Thus:
>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>

We've been running with this patch in the Chrome OS kernel. If it
looks OK to you, it'd be great for it to land in your tree. Thanks!

-Doug

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