lkml.org 
[lkml]   [2021]   [Sep]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v8 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280
On 2021-09-21 01:23, Stephen Boyd wrote:
> Quoting Prasad Malisetty (2021-09-17 10:15:47)
>> On the SC7280, the clock source for gcc_pcie_1_pipe_clk_src
>> must be the TCXO while gdsc is enabled. After PHY init successful
>> clock source should switch to pipe clock for gcc_pcie_1_pipe_clk_src.
>>
>> Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
>> ---
>
> One nit below
>
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
>
>> @@ -1488,7 +1553,9 @@ static int qcom_pcie_probe(struct
>> platform_device *pdev)
>>
>> pcie->pci = pci;
>>
>> - pcie->ops = of_device_get_match_data(dev);
>> + pcie_cfg = of_device_get_match_data(dev);
>> + pcie->ops = pcie_cfg->ops;
>
> Maybe worth failing probe with if (!pcie->ops) just to be a little
> nicer here.
>
Thanks Stephen, I will add the check in new patch series if any.

>> + pcie->pipe_clk_need_muxing = pcie_cfg->pipe_clk_need_muxing;
>>
>> pcie->reset = devm_gpiod_get_optional(dev, "perst",
>> GPIOD_OUT_HIGH);
>> if (IS_ERR(pcie->reset)) {

\
 
 \ /
  Last update: 2021-09-23 12:04    [W:0.056 / U:1.212 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site