Messages in this thread | | | Subject | Re: [PATCH v6 6/6] iommu/tegra-smmu: Add pagetable mappings to debugfs | From | Dmitry Osipenko <> | Date | Tue, 14 Sep 2021 22:20:30 +0300 |
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14.09.2021 21:49, Nicolin Chen пишет: > On Tue, Sep 14, 2021 at 04:29:15PM +0300, Dmitry Osipenko wrote: >> 14.09.2021 04:38, Nicolin Chen пишет: >>> +static unsigned long pd_pt_index_iova(unsigned int pd_index, unsigned int pt_index) >>> +{ >>> + return ((dma_addr_t)pd_index & (SMMU_NUM_PDE - 1)) << SMMU_PDE_SHIFT | >>> + ((dma_addr_t)pt_index & (SMMU_NUM_PTE - 1)) << SMMU_PTE_SHIFT; >>> +} >> >> We know that IOVA is fixed to u32 for this controller. Can we avoid all >> these dma_addr_t castings? It should make code cleaner a tad, IMO. > > Tegra210 actually supports 34-bit IOVA... >
It doesn't. 34-bit is PA, 32-bit is VA.
Quote from T210 TRM:
"The SMMU is a centralized virtual-to-physical translation for MSS. It maps a 32-bit virtual address to a 34-bit physical address. If the client address is 40 bits then bits 39:32 are ignored."
Even if it supported more than 32bit, then the returned ulong is 32bit, which doesn't make sense.
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