Messages in this thread | | | Subject | Re: [EXTERNAL] Re: [RFC 1/1] irqchip/gic-v3-its: Add irq domain and chip for Direct LPI without ITS | From | Robin Murphy <> | Date | Tue, 3 Aug 2021 09:35:12 +0100 |
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On 2021-08-03 03:11, Sunil Muthuswamy wrote: > On Saturday, July 31, 2021 2:52 AM, > Marc Zyngier <maz@kernel.org> wrote: >> >> [...] >> >>>> I also want to understand *how* you are going to plumb this into both >>>> ACPI and DT, given that neither understand how to link a PCI endpoint >>>> to a set of RDs. >>>> >>>> M. >>> >>> One way to do this for NUMA-aware systems would be to use the NUMA >>> related information that is available with PCI endpoints or root complex, to >>> pick a Redistributor/CPU that is in the NUMA node, as specified by the PCI >>> endpoint/root complex. In DT PCI devices can specify this using >>> 'numa-node-id' and in ACPI using the '_PXM (Proximity)'. For systems that >>> are not NUMA-aware, we can go with *any* Redistributor/CPU. >> >> This makes zero sense. From the point of view of a device, all the RDs >> should be reachable, and firmware has no say in it. Dealing with >> interrupt affinity is the responsibility of the endpoint driver, and >> NUMA affinity is only a performance optimisation. >> >>> Is there any additional information we would be able to gather from ACPI >>> or DT that's not there currently, that would be useful here? >> >> You will need some firmware information describing that a given set of >> devices must use the RDs for their MSIs. Just like we currently >> describe it in IORT for the ITS. You cannot /assume/ things. At the >> moment, there is nothing at all, because no-one (including Microsoft) >> thought it would be a good idea not to have an ITS, which is also why >> ACPI doesn't describe MBIs as a potential MSI provider. >> > I am a little bit confused by your above comment. Maybe you can help me > understand the ask. You indicate that from the point of the view of the > device, all the RDs should be reachable. But, then if we define a mapping > between PCI endpoint and RD in the firmware, we would be doing exactly > the opposite. i.e. restricting the RDs that are reachable by the device. Can > you please clarify? > > Is your concern that the device should be able to only DMA to a subset of > GIC Redistributor, for the MSIs? If so, in the IORT, there is "memory address > size limit" for both device and root complex nodes. In the implementation, > we can enforce that the GICR is within that range. And, if a device deviates > further than that (ex: by having accessibility gaps within the GICR range), > then that is out of scope for support.
No, please don't try to abuse the Memory Address Size Limit - that has far more chance of adversely affecting normal DMA operation than of being any use here.
I believe the point Marc was trying to make is that firmware should not associate a device with any one *specific* redistributor, however ACPI currently has no way to describe that MSIs can target redistributors *at all*, only ITS groups - there is no such concept as a "redistributor group".
Robin.
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