Messages in this thread | | | From | Sergio Paracuellos <> | Date | Mon, 23 Aug 2021 07:55:16 +0200 | Subject | Re: [PATCH] clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates |
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On Tue, Jul 27, 2021 at 7:55 AM Sergio Paracuellos <sergio.paracuellos@gmail.com> wrote: > > 'clk_init_data' for gates is setting up 'CLK_IS_CRITICAL' > flag for all of them. This was being doing because some > drivers of this SoC might not be ready to use the clock > and we don't wanted the kernel to disable them since default > behaviour without clock driver was to set all gate bits to > enabled state. After a bit more testing and checking driver > code it is safe to remove this flag and just let the kernel > to disable those gates that are not in use. No regressions > seems to appear. > > Fixes: 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC") > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> > --- > drivers/clk/ralink/clk-mt7621.c | 9 +-------- > 1 file changed, 1 insertion(+), 8 deletions(-)
Hi Stephen,
Are you ok with this?? It has been a while without response.
Thanks in advance for your time.
Sergio Paracuellos
> > diff --git a/drivers/clk/ralink/clk-mt7621.c b/drivers/clk/ralink/clk-mt7621.c > index 857da1e274be..a2c045390f00 100644 > --- a/drivers/clk/ralink/clk-mt7621.c > +++ b/drivers/clk/ralink/clk-mt7621.c > @@ -131,14 +131,7 @@ static int mt7621_gate_ops_init(struct device *dev, > struct mt7621_gate *sclk) > { > struct clk_init_data init = { > - /* > - * Until now no clock driver existed so > - * these SoC drivers are not prepared > - * yet for the clock. We don't want kernel to > - * disable anything so we add CLK_IS_CRITICAL > - * flag here. > - */ > - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, > + .flags = CLK_SET_RATE_PARENT, > .num_parents = 1, > .parent_names = &sclk->parent_name, > .ops = &mt7621_gate_ops, > -- > 2.25.1 >
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