Messages in this thread | | | Date | Mon, 2 Aug 2021 11:52:57 +0300 | From | Jarkko Sakkinen <> | Subject | Re: [PATCH v3 2/7] x86/sgx: Add infrastructure to identify SGX EPC pages |
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On Fri, Jul 30, 2021 at 11:44:00AM -0700, Luck, Tony wrote: > On Fri, Jul 30, 2021 at 09:50:59AM -0700, Dave Hansen wrote: > > On 7/30/21 9:46 AM, Sean Christopherson wrote: > > > Out of curiosity, on multi-socket systems, are EPC sections clustered in a single > > > address range, or are they interleaved with regular RAM? If they're clustered, > > > you could track the min/max across all sections to optimize the common case that > > > an address isn't in any EPC section. > > > > They're interleaved on the systems that I've seen: > > > > Socket 0 - RAM > > Socket 0 - EPC > > Socket 1 - RAM > > Socket 1 - EPC > > > > It would probably be pretty expensive in terms of the physical address > > remapping resources to cluster them. > > I thought xarray was overkill ... and it is ... but it makes the code > considerably shorter/simpler! > > I think I'm going to go with it. Thanks to Jarkko for the suggestion.
If it makes the code considerably simpler, that in my opinion justifies the minor size increase.
/Jarkko
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