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SubjectRe: LKMM: Read dependencies of writes ordered by dma_wmb()?
On Wed, Aug 18, 2021 at 12:39:36PM +0100, Will Deacon wrote:
> Hi Paul.

Hello, Will,

> On Tue, Aug 17, 2021 at 06:53:08AM -0700, Paul E. McKenney wrote:
> > On Tue, Aug 17, 2021 at 01:28:16PM +0100, Will Deacon wrote:

[ . . . ]

> > > Ignore the bits about mmiowb() as we got rid of that.
> >
> > Should the leftovers in current mainline be replaced by wmb()? Or are
> > patches to that effect on their way in somewhere?
>
> I already got rid of the non-arch usage of mmiowb(), but I wasn't bravei
> enough to change the arch code as it may well be that they're relying on
> some specific instruction semantics.
>
> Despite my earlier comment, mmiowb() still exists, but only as a part of
> ARCH_HAS_MMIOWB where it is used to add additional spinlock ordering so
> that the rest of the kernel doesn't need to use mmiowb() at all.
>
> So I suppose for these:
>
> > arch/mips/kernel/gpio_txx9.c: mmiowb();
> > arch/mips/kernel/gpio_txx9.c: mmiowb();
> > arch/mips/kernel/gpio_txx9.c: mmiowb();
> > arch/mips/kernel/irq_txx9.c: mmiowb();
> > arch/mips/loongson2ef/common/bonito-irq.c: mmiowb();
> > arch/mips/loongson2ef/common/bonito-irq.c: mmiowb();
> > arch/mips/loongson2ef/common/mem.c: mmiowb();
> > arch/mips/loongson2ef/common/pm.c: mmiowb();
> > arch/mips/loongson2ef/lemote-2f/reset.c: mmiowb();
> > arch/mips/loongson2ef/lemote-2f/reset.c: mmiowb();
> > arch/mips/loongson2ef/lemote-2f/reset.c: mmiowb();
> > arch/mips/loongson2ef/lemote-2f/reset.c: mmiowb();
> > arch/mips/loongson2ef/lemote-2f/reset.c: mmiowb();
> > arch/mips/pci/ops-bonito64.c: mmiowb();
> > arch/mips/pci/ops-loongson2.c: mmiowb();
> > arch/mips/txx9/generic/irq_tx4939.c: mmiowb();
> > arch/mips/txx9/generic/setup.c: mmiowb();
> > arch/mips/txx9/rbtx4927/irq.c: mmiowb();
> > arch/mips/txx9/rbtx4938/irq.c: mmiowb();
> > arch/mips/txx9/rbtx4938/irq.c: mmiowb();
> > arch/mips/txx9/rbtx4938/setup.c: mmiowb();
> > arch/mips/txx9/rbtx4939/irq.c: mmiowb();
>
> we could replace mmiowb() with iobarrier_w().

Not having MIPS hardware at my disposal, I will leave these to those
who do. I would suggest adding iobarrier_*() to memory-barriers.txt,
but they appear to be specific to MIPS and PowerPC.

Thanx, Paul

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