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SubjectRe: [PATCH 04/10] coresight: trbe: Decouple buffer base from the hardware base
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On 7/28/21 7:22 PM, Suzuki K Poulose wrote:
> We always set the TRBBASER_EL1 to the base of the virtual ring
> buffer. We are about to change this for working around an erratum.
> So, in preparation to that, allow the driver to choose a different
> base for the TRBBASER_EL1 (which is within the buffer range).
>
> Cc: Anshuman Khandual <anshuman.khandual@arm.com>
> Cc: Mike Leach <mike.leach@linaro.org>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Leo Yan <leo.yan@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-trbe.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
> index 0af644331b99..9735d514c5e1 100644
> --- a/drivers/hwtracing/coresight/coresight-trbe.c
> +++ b/drivers/hwtracing/coresight/coresight-trbe.c
> @@ -59,6 +59,8 @@ struct trbe_buf {
> * trbe_limit sibling pointers.
> */
> unsigned long trbe_base;
> + /* The base programmed into the TRBE */
> + unsigned long trbe_hw_base;
> unsigned long trbe_limit;
> unsigned long trbe_write;
> int nr_pages;
> @@ -504,7 +506,7 @@ static void trbe_enable_hw(struct trbe_buf *buf)
> set_trbe_disabled();
> isb();
> clr_trbe_status();
> - set_trbe_base_pointer(buf->trbe_base);
> + set_trbe_base_pointer(buf->trbe_hw_base);

It might be better to add a sanity check asserting 'buf->trbe_hw_base' to
be within [buf->trbe_base..buf->trbe_base + nr_pages * PAGE_SIZE] before
writing that into TRBBASER_EL1.

> set_trbe_write_pointer(buf->trbe_write);
>
> /*
> @@ -709,6 +711,8 @@ static int __arm_trbe_enable(struct trbe_buf *buf,
> trbe_stop_and_truncate_event(handle);
> return -ENOSPC;
> }
> + /* Set the base of the TRBE to the buffer base */
> + buf->trbe_hw_base = buf->trbe_base;

So applicable 'buf->trbe_hw_base' will be derived from 'buf->trbe_base'
after taking into account workarounds (if any). Makes sense.

> *this_cpu_ptr(buf->cpudata->drvdata->handle) = handle;
> trbe_enable_hw(buf);
> return 0;
> @@ -808,7 +812,7 @@ static bool is_perf_trbe(struct perf_output_handle *handle)
> struct trbe_drvdata *drvdata = cpudata->drvdata;
> int cpu = smp_processor_id();
>
> - WARN_ON(buf->trbe_base != get_trbe_base_pointer());
> + WARN_ON(buf->trbe_hw_base != get_trbe_base_pointer());
> WARN_ON(buf->trbe_limit != get_trbe_limit_pointer());
>
> if (cpudata->mode != CS_MODE_PERF)
>

With or without the above sanity check.

Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>

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