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SubjectRe: [PATCH] mmc: dw_mmc: Fix hang on data CRC error
Hi Vicent,

On 7/14/21 8:49 PM, Vincent Whitchurch wrote:
> On Thu, Jul 01, 2021 at 12:06:31AM +0200, Jaehoon Chung wrote:
>> On 6/30/21 7:22 PM, Vincent Whitchurch wrote:
>>> When a Data CRC interrupt is received, the driver disables the DMA, then
>>> sends the stop/abort command and then waits for Data Transfer Over.
>>> However, sometimes, when a data CRC error is received in the middle of a
>>> multi-block write transfer, the Data Transfer Over interrupt is never
>>> received, and the driver hangs and never completes the request.
>>> The driver sets the BMOD.SWR bit (SDMMC_IDMAC_SWRESET) when stopping the
>>> DMA, but according to the manual CMD.STOP_ABORT_CMD should be programmed
>>> "before assertion of SWR". Do these operations in the recommended
>>> order. With this change the Data Transfer Over is always received
>>> correctly in my tests.
>> I will check with your patch. I didn't see any CRC error on my targets before.
> Have you had a chance to check it? You can use the fault-injection
> patch if you want to trigger aborted transfers without getting real CRC
> errors:

Sorry for too late. I did my other task. I will check yours on Today.
Anyway, Thanks for checking this issue.

Best Regards,
Jaehoon Chung


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