Messages in this thread | | | Date | Fri, 4 Jun 2021 15:37:02 +0000 | From | Sean Christopherson <> | Subject | Re: [PATCH 1/2] KVM: LAPIC: write 0 to TMICT should also cancel vmx-preemption timer |
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On Fri, Jun 04, 2021, Wanpeng Li wrote: > On Thu, 3 Jun 2021 at 23:20, Sean Christopherson <seanjc@google.com> wrote: > > > > On Thu, Jun 03, 2021, Wanpeng Li wrote: > > > From: Wanpeng Li <wanpengli@tencent.com> > > > > > > According to the SDM 10.5.4.1: > > > > > > A write of 0 to the initial-count register effectively stops the local > > > APIC timer, in both one-shot and periodic mode. > > > > > > The lapic timer oneshot/periodic mode which is emulated by vmx-preemption > > > timer doesn't stop since vmx->hv_deadline_tsc is still set. > > > > But the VMX preemption timer is only used for deadline, never for oneshot or > > periodic. Am I missing something? > > Yes, it is upstream.
Huh. I always thought 'tscdeadline' alluded to the timer being in deadline mode and never looked closely at the arming code. Thanks!
Maybe name the new helper cancel_apic_timer() to align with start_apic_timer() and restart_apic_timer()? With that:
Reviewed-by: Sean Christopherson <seanjc@google.com>
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