Messages in this thread | | | Date | Fri, 4 Jun 2021 10:18:08 +0800 | From | Steven Lee <> | Subject | Re: [PATCH v3 4/5] gpio: gpio-aspeed-sgpio: Add set_config function |
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The 06/03/2021 19:07, Andy Shevchenko wrote: > On Thu, Jun 3, 2021 at 1:20 PM Steven Lee <steven_lee@aspeedtech.com> wrote: > > > > AST SoC supports *retain pin state* function when wdt reset. > > The patch adds set_config function for handling sgpio reset tolerance > > register. > > ... > > > +static int aspeed_sgpio_set_config(struct gpio_chip *chip, unsigned int offset, > > + unsigned long config) > > +{ > > + unsigned long param = pinconf_to_config_param(config); > > + u32 arg = pinconf_to_config_argument(config); > > + > > + if (param == PIN_CONFIG_PERSIST_STATE) > > + return aspeed_sgpio_reset_tolerance(chip, offset, arg); > > > + else > > Redundant. > > > + return -EOPNOTSUPP; > > IIRC we are using ENOTSUPP internally in the kernel. YEs, checkpatch > warning may be ignored. > > > +} >
I will modify the code as you suggested above, thanks.
> -- > With Best Regards, > Andy Shevchenko
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