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SubjectRe: [PATCH v12 2/2] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
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On Wed, 2021-06-02 at 11:58 -0500, Rob Herring wrote:
> On Sun, May 30, 2021 at 12:52:33AM +0800, Hector Yuan wrote:
> > From: "Hector.Yuan" <hector.yuan@mediatek.com>
> >
> > Add devicetree bindings for MediaTek HW driver.
> >
> > Signed-off-by: Hector.Yuan <hector.yuan@mediatek.com>
> > ---
> > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 71 ++++++++++++++++++++
> > 1 file changed, 71 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > new file mode 100644
> > index 0000000..1aa4d54
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > @@ -0,0 +1,71 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek's CPUFREQ Bindings
> > +
> > +maintainers:
> > + - Hector Yuan <hector.yuan@mediatek.com>
> > +
> > +description:
> > + CPUFREQ HW is a hardware engine used by MediaTek
> > + SoCs to manage frequency in hardware. It is capable of controlling frequency
> > + for multiple clusters.
> > +
> > +properties:
> > + compatible:
> > + const: mediatek,cpufreq-hw
> > +
> > + reg:
> > + minItems: 1
> > + maxItems: 2
> > + description: |
> > + Addresses and sizes for the memory of the
> > + HW bases in each frequency domain.
> > +
> > + "#performance-domain-cells":
> > + description:
> > + Number of cells in a performance domain specifier. Typically 0 for nodes
> > + representing a single performance domain and 1 for nodes providing
> > + multiple performance domains (e.g. performance controllers), but can be
> > + any value as specified by device tree binding documentation of particular
> > + provider.
> > + enum: [ 0, 1 ]
>
> Can't you restrict this to be 1 for Mediatek h/w? Even if you sometimes
> have a single domain, it's probably more simple for the driver if this
> is fixed.
>
OK, I will restrict this as 1 in next version.
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - "#performance-domain-cells"
> > +
> > +additionalProperties: true
>
> Should be false.
>
OK, thanks
> > +
> > +examples:
> > + - |
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a55";
> > + enable-method = "psci";
> > + performance-domains = <&performance 0>;
> > + reg = <0x000>;
> > + };
> > + };
> > +
> > + /* ... */
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + performance: performance-controller@11bc00 {
> > + compatible = "mediatek,cpufreq-hw";
> > + reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
> > +
> > + #performance-domain-cells = <1>;
> > + };
> > + };
> > --
> > 1.7.9.5

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