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SubjectRe: [PATCH v3 1/6] clk: actions: Fix UART clock dividers on Owl S500 SoC
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Quoting Cristian Ciocaltea (2021-06-10 13:05:21)
> Use correct divider registers for the Actions Semi Owl S500 SoC's UART
> clocks.
>
> Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---

Applied to clk-next

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