Messages in this thread | | | From | Andy Shevchenko <> | Date | Sun, 13 Jun 2021 00:29:49 +0300 | Subject | Re: [PATCH v5 2/8] gpio: regmap: Add quirk for aliased data registers |
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On Sun, Jun 13, 2021 at 12:13 AM Sander Vanheule <sander@svanheule.net> wrote: > > Some chips have the read-only input and write-only output data registers > aliased to the same offset. As a result it is not possible to perform > read-modify-writes on the output values, when a line is still configured > as input. > > Add a quirk for aliased data registers, and document how the regmap > should be set up for correct operation.
I still believe that there is no issue with gpio-regmap and we don't need any quirk there.
The issue is in the regmap APIs (implementation) itself. Hardware with the concept of reading X / writing Y at the same offset is okay per se. regmaps doesn't support it properly and should be fixed (amended) in a way that you provide this kind of register description thru regmap configuration or so.
I expressed the idea of trying to implement regmap-8250 as an example of the support for such hardware. And OTOH that this kind of hardware is not unusual.
-- With Best Regards, Andy Shevchenko
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