Messages in this thread | | | Subject | Re: [PATCH v7 9/9] arm64: dts: rockchip: Enable SFC for Odroid Go Advance | From | Jon Lin <> | Date | Fri, 11 Jun 2021 10:26:35 +0800 |
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Hi Chris
May you attach the XT25F128B device code to me, and I'll try to work it out.
On 6/11/21 1:36 AM, Chris Morgan wrote: > On Wed, Jun 09, 2021 at 10:13:48PM +0800, Jon Lin wrote: >> From: Chris Morgan <macromorgan@hotmail.com> >> >> This enables the Rockchip Serial Flash Controller for the Odroid Go >> Advance. Note that while the attached SPI NOR flash and the controller >> both support quad read mode, only 2 of the required 4 pins are present. >> The rx and tx bus width is set to 2 for this reason. >> >> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> >> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> >> --- >> >> Changes in v7: None >> Changes in v6: None >> Changes in v5: None >> Changes in v4: None >> Changes in v3: None >> Changes in v2: None >> Changes in v1: None >> >> .../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ >> 1 file changed, 16 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts >> index 49c97f76df77..f78e11dd8447 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts >> +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts >> @@ -484,6 +484,22 @@ >> status = "okay"; >> }; >> >> +&sfc { >> + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; >> + pinctrl-names = "default"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + status = "okay"; >> + >> + flash@0 { >> + compatible = "jedec,spi-nor"; >> + reg = <0>; >> + spi-max-frequency = <108000000>; >> + spi-rx-bus-width = <2>; >> + spi-tx-bus-width = <2>; > Note that I am still working with Jon Lin to research this, but it was > found in testing that if I set the tx bus width to 1 the problems I > encountered in earlier are resolved. At this time I do not know if it > is an issue with the driver for the flash controller, or if the NOR, or > board itself has some sort of errata which prevent dual tx from working > correctly. Note that as of right now the flash chip I am using (an > XTX XT25F128B) is not currently supported in mainline, so it's very > possible this is some sort of errata with the chip. It's also possible > that there is something with the board that is interferring with dual > mode TX. When Jon comes back that he has tested dual mode on the SFC > with a different board/chip I will recommend that we change the tx > bus width here to a 1, and then once the XT25F128B gets mainlined we > can see if someone else has issues with dual tx mode so we can note > that as a problem with the chip. Or maybe there is something weird > with dual tx mode yet on the SFC driver/controller, I don't know yet. > I'm all too happy to work with a Rockchip engineer so things like > this can be determined before we hit mainline. :-) > > The XTX25F128B driver is currently awaiting a decision on how to handle > continuation codes, as this chip ID should be using continuation codes, > but doesn't appear to return them when you query for manufacturer ID. > So I should also note in the commit here that the SFC will still be > unusable on the Odroid Go Advance until the XTX25F128B is also > mainlined. > > Thank you. > >> + }; >> +}; >> + >> &tsadc { >> status = "okay"; >> }; >> -- >> 2.17.1 >> >> >> > >
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