Messages in this thread | | | From | Sibi Sankar <> | Subject | [PATCH v2 0/2] DDR/L3 Scaling support on SC7280 SoCs | Date | Tue, 4 May 2021 12:28:28 +0530 |
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The patch series adds support for DDR/L3 Scaling on SC7280 SoCs.
V2: * Add a new opp table for cpu 7 to account for the additional frequencies supported by it.
Depends on the following patch series: L3 Provider Support: https://lore.kernel.org/lkml/1618556290-28303-1-git-send-email-okukatla@codeaurora.org/ CPUfreq Support: https://lore.kernel.org/lkml/1618020280-5470-2-git-send-email-tdas@codeaurora.org/ RPMH Provider Support: https://lore.kernel.org/lkml/1619517059-12109-1-git-send-email-okukatla@codeaurora.org/
It also depends on L3 and cpufreq dt nodes from the ^^ series to not have overlapping memory regions.
Sibi Sankar (2): cpufreq: blacklist SC7280 in cpufreq-dt-platdev arm64: dts: qcom: sc7280: Add cpu OPP tables
arch/arm64/boot/dts/qcom/sc7280.dtsi | 215 +++++++++++++++++++++++++++++++++++ drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 2 files changed, 216 insertions(+)
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