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    Subject[PATCH 5.4 219/244] net: davinci_emac: Fix incorrect masking of tx and rx error channel
    Date
    From: Colin Ian King <colin.king@canonical.com>

    [ Upstream commit d83b8aa5207d81f9f6daec9888390f079cc5db3f ]

    The bit-masks used for the TXERRCH and RXERRCH (tx and rx error channels)
    are incorrect and always lead to a zero result. The mask values are
    currently the incorrect post-right shifted values, fix this by setting
    them to the currect values.

    (I double checked these against the TMS320TCI6482 data sheet, section
    5.30, page 127 to ensure I had the correct mask values for the TXERRCH
    and RXERRCH fields in the MACSTATUS register).

    Addresses-Coverity: ("Operands don't affect result")
    Fixes: a6286ee630f6 ("net: Add TI DaVinci EMAC driver")
    Signed-off-by: Colin Ian King <colin.king@canonical.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/net/ethernet/ti/davinci_emac.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c
    index ae27be85e363..7cc09a6f9f9a 100644
    --- a/drivers/net/ethernet/ti/davinci_emac.c
    +++ b/drivers/net/ethernet/ti/davinci_emac.c
    @@ -169,11 +169,11 @@ static const char emac_version_string[] = "TI DaVinci EMAC Linux v6.1";
    /* EMAC mac_status register */
    #define EMAC_MACSTATUS_TXERRCODE_MASK (0xF00000)
    #define EMAC_MACSTATUS_TXERRCODE_SHIFT (20)
    -#define EMAC_MACSTATUS_TXERRCH_MASK (0x7)
    +#define EMAC_MACSTATUS_TXERRCH_MASK (0x70000)
    #define EMAC_MACSTATUS_TXERRCH_SHIFT (16)
    #define EMAC_MACSTATUS_RXERRCODE_MASK (0xF000)
    #define EMAC_MACSTATUS_RXERRCODE_SHIFT (12)
    -#define EMAC_MACSTATUS_RXERRCH_MASK (0x7)
    +#define EMAC_MACSTATUS_RXERRCH_MASK (0x700)
    #define EMAC_MACSTATUS_RXERRCH_SHIFT (8)

    /* EMAC RX register masks */
    --
    2.30.2


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