| From | Greg Kroah-Hartman <> | Subject | [PATCH 5.12 170/677] serial: stm32: add FIFO flush when port is closed | Date | Wed, 12 May 2021 16:43:36 +0200 |
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From: Erwan Le Ray <erwan.leray@foss.st.com>
[ Upstream commit 9f77d19207a0e8ba814c8ceb22e90ce7cb2aef64 ]
Transmission complete error is sent when ISR_TC is not set. If port closure is requested despite data in TDR / TX FIFO has not been sent (because of flow control), ISR_TC is not set and error message is sent on port closure but also when a new port is opened.
Flush the data when port is closed, so the error isn't printed twice upon next port opening.
Fixes: 64c32eab6603 ("serial: stm32: Add support of TC bit status check") Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Link: https://lore.kernel.org/r/20210304162308.8984-12-erwan.leray@foss.st.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/tty/serial/stm32-usart.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 183c76ddb165..d205fce1950a 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -691,6 +691,11 @@ static void stm32_usart_shutdown(struct uart_port *port) if (ret) dev_err(port->dev, "Transmission is not complete\n"); + /* flush RX & TX FIFO */ + if (ofs->rqr != UNDEF_REG) + writel_relaxed(USART_RQR_TXFRQ | USART_RQR_RXFRQ, + port->membase + ofs->rqr); + stm32_usart_clr_bits(port, ofs->cr1, val); free_irq(port->irq, port); -- 2.30.2
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